There are three, five or seven simple gates that you need to learn about, depending on how you want to count them (you will see why in a moment). With these simple gates you can build combinations that will implement any digital component you can imagine. These gates are going to seem a little dry here, and incredibly simple, but we will see some interesting combinations in the following sections that will make them a lot more inspiring. If you have not done so already, reading How Bits and Bytes Work would be helpful before proceeding.

### NOT Gate

The simplest possible gate is called an "inverter," or a NOT gate. It takes one bit as input and produces as output its opposite. The logic table is:

### A Q

0 1

1 0

The NOT gate has one input called **A** and one output called **Q** ("Q" is used for the output because if you used "O," you would easily confuse it with zero). The table shows how the gate behaves. When you apply a 0 to A, Q produces a 1. When you apply a 1 to A, Q produces a 0. Simple.

### AND Gate

The AND gate performs a logical "and" operation on two inputs, A and B:

### A B Q

0 0 0

0 1 0

1 0 0

1 1 1

The idea behind an AND gate is, "If A **AND** B are both 1, then Q should be 1." You can see that behavior in the logic table for the gate. You read this table row by row, like this:

### A B Q

0 0 0 *If A is 0 AND B is 0, Q is 0.*

0 1 0 *If A is 0 AND B is 1, Q is 0.*

1 0 0 *If A is 1 AND B is 0, Q is 0*.

1 1 1 *If A is 1 AND B is 1, Q is 1.*

### OR Gate

The next gate is an OR gate. Its basic idea is, "If A is 1 **OR** B is 1 (or both are 1), then Q is 1."

### A B Q

0 0 0

0 1 1

1 0 1

1 1 1

Those are the three basic gates (that's one way to count them). It is quite common to recognize two others as well: the **NAND** and the **NOR** gate. These two gates are simply combinations of an AND or an OR gate with a NOT gate. If you include these two gates, then the count rises to five. Here's the basic operation of NAND and NOR gates -- you can see they are simply inversions of AND and OR gates:

### NOR Gate

### A B Q

0 0 1

0 1 0

1 0 0

1 1 0

### NAND Gate

A B Q

0 0 1

0 1 1

1 0 1

1 1 0

The final two gates that are sometimes added to the list are the **XOR** and **XNOR** gates, also known as "exclusive or" and "exclusive nor" gates, respectively. Here are their tables:

### XOR Gate

### A B Q

0 0 0

0 1 1

1 0 1

1 1 0

### XNOR Gate

### A B Q

0 0 1

0 1 0

1 0 0

1 1 1

The idea behind an XOR gate is, "If either A **OR** B is 1, but **NOT** both, Q is 1." The reason why XOR might not be included in a list of gates is because you can implement it easily using the original three gates listed.

If you try all four different patterns for A and B and trace them through the circuit, you will find that Q behaves like an XOR gate. Since there is a well-understood symbol for XOR gates, it is generally easier to think of XOR as a "standard gate" and use it in the same way as AND and OR in circuit diagrams.

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